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1990 Tech Reports

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CENG 90-01           SNAP Controller
by Hirendu Vaishnav
CENG 90-02

Algorithm-Driven Performance Simulation of the USC Orthogonal Multiprocessor
by Chien-Ming Cheng, Sharad Mahrotra, Michael Dubois, Kai Hwang

CENG 90-03

Architectural Design of the USC Orthogonal Multiprocessor
by K. Hwang, D. K. Panda, S. Rao and H. Nais

CENG 90-04 The USC Orthogonal Multiprocessor for Image Processing with Neural Networks
by K. Hwang D. K Panda, N. Haddadi and R. Chellappa
CENG 90-05 A Decoupled Graph/Computation Architecture with Variable Resolution Actors
by P. Evripidou and Jean-Luc Gaudiot

CENG 90-06

Dynamic Routing and Congestion Control for Multi-Class Virtual Circuit Networks
by A. A. Eonomides, P. A. Ioannou and J A. Silvester
CENG 90-07 Evaluating Optimizing Transformations of Behavioral Descriptions
by Rajiv Jain and Alice Parker
CENG 90-08

Test Generation for the JPL Viterbi Decoder Chip
by M.A Breuer, Margaret Driscoll, Rajesh Gupta, Rajiv Gupta, Shen Lin
and Rajagopalan Srinivasan

CENG 90-09 Assigning Signa flow Directions to MOS Transistors
by Lee, Gupta, Breuer
CENG 90-10

Test-Efficiency Analysis of Random Self-test of Sequential Circuits
by Sastry and Majumdar

CENG 90-11 Stochastic Characterization of Controllability ingeneral NAND and AND Trees
by Amita Majumdar and Sharma Sastry
CENG 90-12  
CENG 90-13 Efficient Testing of Acyclic Structures in Partial Scan Designs
by Rajesh Gupta and Melvin A. Breuer
CENG 90-14 A Module Maintenance Controller Prototype
by Jung-Chuen Lien
CENG 90-15 Asynchronous Iterative Algorithms for Problems with Discrete Data
by Aydin Uresin
CENG 90-16 Priority Load Sharing: An Approach Using Stackelberg Games
by A. A. Economedies and John Silvester
CENG 90-17 VYUHA: A Detailed Router for Multiple Routing Models
by C.P. RaviKumar and S. Sastry
CENG 90-18 Virtual Address Caches
by Michael Cekleov, Michael Dubois, Jun-Chin Wang, Faye A. Briggs
CENG 90-19 A Methodology for Partitioning and Hierarchical Reorganization of
Ssequential Circuits for DFT and BIST

by Rajiv Gupta, Rajagopalan Srinivasan and Melvin Breuer
CENG 90-20 On Optimal and Practical Routing Methods for a Massive Data Movement
Operation on Hypercubes

by Rajendra V. Boppana and C. S. Raghavendra
CENG 90-21 Delayed Consistency Protocols
by Michael Dubois
CENG 90-22 Improving Structure Handling and Recursive Function Calls in the USC Occamflow Translator
by Jean-Pierre Abello
CENG 90-23 Macro Data-Flow Simulator Display Interface
by Olivier Tardieu
CENG 90-24 The Effects of Physical Design Characteristics on the Quality of Synthesized Designs
by Alice C. Parker, Jen-Pin Weng, Pravil Gupta and Agha Hussain
CENG 90-25 Synthesis of Application-Specific Multiprocessor Architectures
by Shiv Prakash and Alice C. Parker
CENG 90-26 CHOP: A Constraint-Driven System- Level Partitioner
by Kayhan Kucukcakar and Alice .C Parker
CENG 90-27 3D Scheduling: High Level Synthesis with Floorplanning
by Jen-Pin Weng and Alice C. Parker
CENG 90-28 Reconfigurable fault Tolerant Networks for Fast Packet Switching
by Shih-Chian Yang and John A. Silvester
CENG 90-29 The Effects of Physical Design Characteristics on the Area-Performance Tradeoff Curve
by Alice Parker, Pravil Gupta and Agha Hussain
CENG 90-30

Flexible, Fault-Tolerant Routing Criteria for Circuit-Switched Hypercubes
by Ge-Ming Chiu, Suresh Chalasani and C.S. Raghavandra

CENG 90-31 BAD: Behavioral Area-Delay Predictor
by Kayhan Kucukcakar and Alice C. Parker
CENG 90-32 The Synthesis of Control-Dominated Application Specific Integrated Circuits Using Global Based Design Management
by Sally Hayati