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1991 Tech Reports

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CENG 91-01 Unified System Construction
by Kayhan Kucukcakar, Alice C. Parker, Shiv Prakash, Jen-Pin Weng
CENG 91-02 Maximal Diagosis for Wiring Networks
by Jung-Cheun Lien and Melvin Breuer
CENG 91-03 A Snooping Cache Coherence Protocol for a Ring Connected Multipro
by Luiz A. Barroso and Michel Dubois
CENG 91-04 Stochastic Testability Analysis in Homogeneous Circuits
by Amitava Majumdar and Sarma Sastry
CENG 91-05 Neural Network Vision Integration Through Cooperative Learning on a
Massively Parallel Computer

by Scott Toborg and Kai Hwang
CENG 91-06 Fast Synchronization of Large Multiprocessors Using Wired-NOR Barriers
and Counting Semaphores

by Kai Hwang and Shisheng Shang
CENG 91-07 Mapping Multicomputer Communication Patterns onto Multiprocessors as
Message Vectors in Shared Memory

by Dhabaleswar K. Panda and Kai Hwang
CENG 91-08 Performance Analysis of a Simulated Orthogonal Multiprocessor
by Kai Hwang and Chien-Ming Cheng
CENG 91-09 SIESTA 1.0 User's Manual
by Rajesh Gupta
CENG 91-10 Advanced Serial Scan Design for Testability
by Rajesh Gupta
CENG 91-11 Heuristic Process Migration for Dynamic Load Balancing in a
Message-Passing Multicomputer

by Kai Hwang and Jian Xu
CENG 91-12 Analytical Modeling of Shared Block Contention in Cache
Coherence Protocols

by Jin-Chin Wang
CENG 91-13 Numerical Partial Differential Equtaions Solvers on Variable-grain
Data-flow Multiprocess systems

by Chih-Ming Lin
CENG 91-14 Delayed Consistencey and Its Effects on the Miss Rate of Parallel Programs
by Michael Dubois, Jin-Chin Wang, Luiz A. Barros, Kangwoo Lee, Yung-Syau Chen
CENG 91-15 Reconfigurable Networks For Fast Packet Switching Shih-Chian Yang
by Shi-Chian Yang
CENG 91-16 Control Path/Data Path Tradeoffs in VLSI Design
by Mitchell J. Misnar
CENG 91-17 A Mathematical Programming Model for Synthesis of Multiprocessor systems:
Linearization, An example Model, and Some Tradeoff Studies

by Shiv Prakash and Alice C. Parker
CENG 91-18 A Systematic Approach for Designing Testable VLSI Circuits
by Sen-Pin Lin, Charles A. Nijinda, and Melvin Breuer
CENG 91-19 Design of Hierarchically Testable and Maintainable Systems
by Jung-Cheun Lien
CENG 91-20 Synthesis of Optimal 1-Hot Coded On-chip Controllers for BIST Hardware
by D. Mukherjee, C. Nijinda, and M. A. Breuer
CENG 91-21 VHDL2DDS: A VHDL Language to DDS Data Structure Translator
by Chih-Tung Chen
CENG 91-22 Switch Level Test Generation for CMOS Circuits
by Kuen-Jong Lee
CENG 91-23 Parallel Orientation of Polygonal Parts
by Viktor Prasanna and Anil Rao
CENG 91-24 Parallel Processing of Production Systems on Data-Flow Multiprocessors
by Andrew Sohn
CENG 91-25 Parallel Algorithms For Automating VLSI Physical Design
by Ravikumar P. Chennagiri
CENG 91-26 Software Aspects of Bold A System and User's Manual
by Jung-Cheun Lien

CENG 91-27

System-Level Synthesis Techniques with Emphasis On Partitioning
And Design Planning

by Kayhan Kucukcakar

CENG 91-28 Numerical Partial Differential Equations Solvers on Variable-grain
Data-flow Multiprocessor Systems

by Chih-Ming Lin
CENG 91-29 SOS: Synthesis of Application-Specific Heterogeneous Multiprocessor systems
by Shiv Prakash and Alice C. Parker
CENG 91-30 Symbolic Jacobian Inversion for Redundant Manipulators
by Carlos L. Luck and Sukhan Lee
CENG 91-31 Emulating a Data-Flow Machine Using a Network of Transputers
by Moez Ayed and Jean-Luc Gaudiot