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1994 Tech Reports

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CENG 94-01 Formal Verification of Complex Coherence Protocols Using
Symbolic State Models

by Fong Pong and Michel Dubois
CENG 94-02 Test Embedding With Discrete Logarithms
by Mody Lempel, Sandeep K. Gupta and Melvin A. Breuer
CENG 94-03 Unifed System Construction (USC) Tools
by Alice Parker
CENG 94-04 Clock Grouping: A Low Cost DFT Methodology for Delay Testing
by Wen-Chang Fang and Sandeep K. Gupta
CENG 94-05 Logic Leve Power Estimation Considering Spatiotemporal Correlations
by Logic Leve Power Estimation Considering Spatiotemporal Correlations
CENG 94-06 Multi-Level Network Optimization Targeting Low Power
by S. Iman and M. Pedram
CENG 94-07 Low Power State Assignment Targeting Two-and
Multi-Level Logic Implementations

by C-Y Tsui, C-A Chen, M. Pedram. And A.M. Despain
CENG 94-08 Random Pattern Testable Logic Synthesis
by Chen-Huan Chiang and Sandeep K. Gupta

CENG 94-09

A Binding Environment for Processing Logic prorams on
Large-Scale Parallel Architectures

by Hiecheol Kim and Jean-Luc Gaudiot

CENG 94-10

The NDF Model: Processing Logic Programs on
Large-Scale Parallel Architectures

by Hiecheol Kim and Jean-Luc Gaudiot

CENG 94-11

A Design System To Support Built-In Self-Test of VLSI Circuits
Using Bilbo-Oriented test Methodologies

by Sen-Pin Lin
CENG 94-12 Zero-Aliasing for Modeled Faults
by Mody Lempel and Sandeep K. Gupta
CENG 94-13 Recombination, Selection, and the Genetic Construction of Computer Programs
by Walter Alden Tackett
CENG 94-14 Jitter at an ATM Multiplexer in The Presence of Correlated Traffic
by Ram Krishnan, John A. Silvester and C. S. Raghavendra
CENG 94-15 The U.S.C Multiprocessor TestBed Project: Project Overview
by Michel Dubois, L. Barroso, S. Iman, J. Jeong, k. Oner and K. Ramamurthy
CENG 94-16 Functional Prograaming and Fine-Grain Multithreading for
High-Performance Parallel Computing

by Chihyun Kim
CENG 94-17 System-Level Design Techniques and Tools for Synthesis of
Application-Specific Digital Systems

by Chih-Tung Chen
CENG 94-18 A Methodology and Design Tools to Support System-Leel VLSI Design
by Kayhan Kucukcakar and Alice C. Parker
CENG 94-19 Approximate Performance models of Multimedia Communications
Over Fast Packet-Switched Networks

by Stanley Shiouming Wang
CENG 94-20 High-Level Synthesis of Memory-Intensive Application-Specific Systems
by Pravil Gupta
CENG 94-21 An Integrated Test Controller Synthesis System
by Debaditya Mukherjee
CENG 94-22 A Comparative Study of The Programmability of a Signal Processing
Application in an MIMD and an SIMD Multiprocessor

by Dae-Kyun Yoon and Jean-Luc Gaudiot
CENG 94-23 DISHA: An Efficient, Fully Adaptive Deadlock Recovery Scheme
by Anjan K.V. and Timothy Mark Pinkston
CENG 94-24 D-BMAP Models for Performance Evaluation of ATM Networks
by John A. Silvester, Nelson L.S. Fonseca and Stanely S. Wang
CENG 94-25 Queueing Network Models for Multiple Class Broadband
Integrated Services Digital Networks

by Nelson Luis Saldanha da Fonseca
CENG 94-26 Pseudo-Exhaustive Built-In Self-Test System for Logic Circuits
by Rajagopalan Srinivasan
CENG 94-27 Factored Edge-Valued Binary Decision Diagrams and Their Application to
Matrix Representation and Manipulation

by Paul Tafertshofer and Massoud Pedram
CENG 94-28 A Specification of The Array Semantics for Sisal 2.0
by Yung-Syau Chen and Jean-Luc Gaudiot

 CENG 94-29

An Analytical Model for Multi-group Slotted ALOHA With Capture
by Te-Kai Liu, John A. Silvester and Andreas Polydoros
 CENG 94-30 Performance Evaluation of R-ALOHA in Distributed Packet Radio
Networks with Hard Real-Time Communications

by Te-Kai Liu, John A. Silvester and Andreas Polydoros
 CENG 94-31 A General Performance Model for Mobile Slotted ALOHA Networks with Capture
by Te-Kai Liu, John A. Silvester and Andreas Polydoros
 CENG 94-32  
 CENG 94-33 Scan Chaining and Test Scheduling in an Integrated Scan Design System
by Sridhar Narayanan

 CENG 94-34

A Practical BIST TPG Design Methodology
by Chih-Ang Chen and Sandeep K. Gupta
 CENG 94-35 Constructing Minimal Spanning Trees with Bounded Path Length
by Iksoo pyo, Jaewon Oh and Massoud Pedram
 CENG 94-36 An Exact Framework for Post-Layout Timing Correction
by Hirendu Vaishnav and Massoud Pedram
 CENG 94-37 Built-in Self-Test for Modeled Faults
by Mody Lempel
 CENG 94-38 Data-Flow Assembly Lanugage
by Moez Ayed and Jean-Luc Gaudiot