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2000 Tech Reports

Click on a technical report number to view in PDF.

CENG 00-01          A New Framework for Static Timing Analysis, Incremental Timing Refinement & Timing Simulation
by Liang-Chi Chen, Sandeep Gupta and Melvin Breuer
CENG 00-02

 I-Structure Software Caches: Exploiting Global Data Locality in Non-Blocking Multithreaded Architectures
by Wen-Yen Lin

CENG 00-03

The Case for Virtually-Addressed Memory Hierarchies
by Xiaogang Qiu and Michel Dubois

CENG 00-04 Toward Virtually Addressed Memory Hierarchies
by Xiaogang Qiu
CENG 00-05 EE577b VLSI Design Project: A Design of a Turbo Decoder Chip
by Pornchai Pawawongsak
CENG 00-06 An Exact Fault Simulation for Systems on Silicon that Protects Each Cores Intellectual Property (IP)
by
CENG 00-07 Test Generation For Crosstalk Noise in VLSI Circuits
by Wei-Yu Chen