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Dr. Pinkston is a Professor in the EE-Systems Department of the Viterbi School of Engineering at USC where he heads the SMART Interconnects research group. Prior to joining USC in 1993, he was a Member of Technical Staff at Bell Laboratories, a Hughes Doctoral Fellow at Hughes Research Laboratory, and a visiting researcher at IBM T. J. Watson Research Laboratory. Presently, he is serving a 2-year term as a program manager in the CCF Division of the CISE Directorate at the National Science Foundation (NSF). His research interests include the development of deadlock-free adaptive routing techniques and on-chip network and router architectures for achieving high-performance communication in multicore and multiprocessor computer systems. Most recently, Dr. Pinkston co-authored a book chapter with Prof. Jose Duato (UPV) entitled, "Interconnection Networks". This chapter appears as Appendix E in the 2006 release of a best-selling text, "Computer Architecture: A Quantitative Approach", 4th edition, by John Hennessy and David Patterson. Instructional slides for this chapter can be found here.
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Editorial Service: Guest Editor, IEEE Transactions on Parallel and Distributed Systems, Special Section on On-Chip Networks, Vol. 16, No. 2, February, 2005. Guest Editor, SPIE Optical Networks Magazine, Special Issue on Using Optics in Parallel and Distributed Computing and Communication, Vol. 4, No. 4, July/August, 2003. Associate Editor, IEEE Transactions on Parallel and Distributed Systems Journal, 1999-2002. Conference Service: General Chair, The 21st Int'l Parallel and Distributed Processing Symposium (IPDPS'07), Long Beach, CA, April 2007. Program Chair, The 12th Int'l Conf. on Parallel and Distributed Systems (ICPADS'06), Minneapolis, MN, July 2006. Program Chair, The 10th Int'l Conf. on High Perfermance Computing (HiPC'03), Hyderabad, India, December 2003. Program Co-Chair, The 4th Int'l Conf. on Massively Parallel Processing Using Optical Interconnects (MPPOI'97), Montreal, CA, June 1997. Program Vice-Chair, The 10th Int'l Conf. on Parallel and Distributed Systems (ICPADS'04), Communication Networks and Systems Track, Newport Beach, CA, July 2004. Program Vice-Chair, Euro-Par 2003, Topic 14: Routing and Communication in Interconnection Networks, Klagenfurt, Austria, August 26-29, 2003. Workshops Co-Chair, The 35th Int'l Conf. on Parallel Processing (ICPP'06), Columbus, OH, August 2006. Workshops Chair, The 30th Int'l Conf. on Parallel Processing (ICPP'01), Valencia, Spain, September 2001. Tutorials Chair, The 31st Int'l Symposium on Computer Architecture (ISCA'04), Munich, Germany, June 2004. Publicity Co-Chair, The 34th Int'l Conference on Parallel Processing (ICPP'05), Oslo, Norway, June 2005. Finance Chair, The 2nd Int'l Conf. on Cluster Computing (Cluster'01), Newport Beach, CA, October 2001. Panel Moderator, Hot Interconnects Symposium (HotI'06), "Challenges for Future Interconnection Networks: Power, Reliability, Performance Scalability?", Stanford, CA, August 2006. Panel Moderator, The 8th Symposium on High Performance Computer Architecture (HPCA'02) Panel, "What Will Have The Greatest Impact In 2010: Processor, Memory, or Interconnnect Architecture?" Boston, MA, 2002. Panel Moderator, Workshop on Communication Architectures for Clusters (CAC'01), "InfiniBand: The De Facto Future Standard for System and Local Area Networks or Just a Scalable Replacement for PCI Buses?", San Francisco, CA, 2001. Panelist, "Parallel Processing--The First 35 Years, the Next 35 Years", The 35th Int'l Conf. on Parallel Processing (ICPP'06), Columbus, OH, August 2006. Program Committee Member (since 2000): HPCA'05,'03; ISCA'01; IPDPS'04,'03; ICPP'06,'05,'03-'00; CAC'06-'01; NOCS'07; ARCS'06; SAN'04,'03; SNAPI'03; CS&I'02; WON'02,'01; ICDCS-21'01;
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