USC Wordmark Ming Hsieh mark

CENG Technical Reports

1989 Tech Reports

CENG 89-01 Fault Tolerance and Reliability Analysis of Large-Scale Multicomputer Systems
by Walid A. Najjar
CENG 89-02 Parallel Computing with Optical Interconnects
by Mehrnoosh Mary Eshaghian
CENG 89-03 Test Generation Systems (TGS) User's Manual-Version 1.0
by Kuen-Jong Lee
CENG 89-04  
CENG 89-05 Detailed Analysis of Bridging Faults in CMOS Scan Registers
by Kuen-Jong Lee and Melvin A. Breuer
CENG 89-06 The EVE VLSI Management Environment
by Hamiden Afsarmanesh, Esther Brotoatmodjo, Kwang June Byeon and Alice Parker
CENG 89-07 LARA: A Layout Accelerator based on Reduced Array Architecture
by C. P. RaviKumar and Sarma Sastry
CENG 89-08  
CENG 89-09 A Parallel Approach to Three-Layer Channel Routing
by C. P. RaviKumar and Sarma Sastry
CENG 89-10 SNAP: A Marker-Propagation Architecture for Knowledge Processing
by Dan Moldovan, Wing Lee, Changhwa Lin
CENG 89-11 SNAP: Simulation Results
by Dan Moldovan, Changhwa Lin
CENG 89-12 Text Understanding on SNAP
by Dan Moldovan and Ig-Tae Um
CENG 89-13 Reasoning on the Connection Machine
by Sang-Hwa Chung and Dan Moldovan
CENG 89-14 Control in Productions Systems with Multiple rule Firings
by Moldovan, Kuo and Cha, Steve Kuo, Dan Moldovan and Urula Schwultke
CENG 89-15 Parallel Asynchronous Algorithms for Discrete Data
by Michael Dubois and Adsin Uresin
CENG 89-16 An Asynchronous All Pairs Shortes Path Algorithm for Multiprocessors
by Uresin and Dubois
CENG 89-17 Worst Case Analysis of Asynchronous Iterative Algorithms
by Uresin and Dubois
CENG 89-18 Analytical Modeling of Data Sharing in Cache-Based Multiprocessors
by Wang and Dubois
CENG 89-19 Access Ordering and Coherence in shared Memory Multiprocessors
by Scheurich
CENG 89-20 Asynchronous Iterations with Bonded Delay
by Uresin and Dubois
CENG 89-21 Data Path Design Tradeoffs Using MABAL
by Kayhan Kucukcakar and Alice C. Parker
CENG 89-22 Fault Tolerant Multistage Interconnection Networks
by Yang and Silvester
CENG 89-23 High-Level Area Delay Prediction with Application to Behavioral Synthesis
by Rajiv Jain
CENG 89-24 Bandwidth Analysis of Message-Passing Networks
by Moldovan
CENG 89-25 Queueing Analysis of an ATM Switch with Multichannel Transmission
by Arthur Lin and John Silvester
CENG 89-26 Fixed-Node Routing and Architecture and its Performance in an ATM Switch
by Arthur Lin and John Silvester
CENG 89-27 The Macro Data Flow Simulator
by Namhoon Yoo and Jean-Luc Gaudiot
CENG 89-28 The USC Macro Data-Flow Assembly Language
by Jean-Luc gaudiot and Moez Ayed
CENG 89-29 The State of the Art in Parallel Production Systems
by Steven Kuo and Dan Moldovan
CENG 89-30 Implementation of Neural Networks on Massive Memory Organizations
by Manavendra Misra and V.K. Prasanna Kumar
CENG 89-31 Architecture Embeddings Designs a Simulation of an i860 Based Orthogonal Multiprocessor
by K. Hwang, D. Panda, C. Ching, S. Rao, S. Mahotra, H. Nair
CENG 89-32 Representing Temporal Information for Digital System Software
by John Granacki and Alice Parker
CENG 89-33 The Design of the SNAP Chip
by Wing Lee and Dan Moldovan
CENG 89-34 Parallel Classification for Knowledge Representation on SNAP
by Juntae Kim and Dan Moldovan
CENG 89-35 The Performance of an ATM Switch with Multichannel Transmission groups
by Arthur Lin and John Silvester
CENG 89-36 Self Routing Schemes in Parallel Memory Access
by Boppana and Raghavendra
CENG 89-37 Optimal Self Routing of Linear-Complement Permutations in Hypercubes
by Boppana and Raghavendra
CENG 89-38 Routing Games
by A. A. Economides and John Silvester
CENG 89-39 Priority Load Sharing: An Approach Using Stackalberg Games
by A.A. Economides and J.A. Silvester

1988 Tech Reports

CRI-88-01 Towards a Unified Decision Technology: Area of Common Interest through Artificial intelligence and Business Forecasting
by Bruce Abramson
CRI-88-02 Object Flavor Evolution in an Object Oriented Database System
by Qing Li, Dennis McLeod
CRI-88-03 Conceptual Database Evolution through Learning
by Qing Li, Dennis McLeod
CRI-88-04 On-Chip Controller Design for Built-in-Text
by Melvin Breuer
CRI-88-05 Parallel Asynchronous Algorithms for Discrete Data
by Majid Haghoo, Wlodek Proskurowski
CRI-88-06 Parallel efficiency of a Domain Decomposition Method
by Majid Haghoo, Wlodek Proskurowski
CRI-88-07 Object Database Support for a Software Project Management Environment
by Lung-Chun Liu, Ellis Horowitz
CRI-88-08 On the Composition of Datalog Program Mapping
by Guozhu Dong
CRI-88-09 Dual Redundant Arm Configuration Optimization with Task-Oriented
by Sukhan Lee, Jang M. Lee
CRI-88-10 Variable-Axis Tool Positioning for NC Path Generation
by Allan Hansen, Farhad Arbab
CRI-88-11 The ADAM Design Planning Engine
by David W. Knapp, Alice C. Parker
CRI-88-12 Data Path Synthesis of Pipelined Designs: Theoretical Foundations
by R. Jain, N. Park, A. C. Parker
CRI-88-13 Multi-Agent Cooperative Problem Solving and Learning with Axiom-Based Reasoning
by Sukhan Lee, Yeong Gil Shin
CRI-88-14 Optical Communication for Pointer-Based Algorithms
by Richard J. Anderson, Gary L. Miller
CRI-88-15 P3: A Parallel Planner Concurrently Generating Parallel Plans
by Sukhan Lee, Kyusik Chung
CRI-88-16 Multilayer Feedforward Potential Function Network
by Sukhan Lee, Rhee M. Kil
CRI-88-17 Sequential and Parallel Algorithms for Computing a Large Independent Set in Planar Graphs
by M. Chrobak. J. Naor
CRI-88-18 Fairness Considerations in an Integrated Voice/Data LAN
by C. Yuan, J. Silvester
CRI-88-19 Numerical Algoriths in a Data-Driven Environment
by J.-L. Gaudiot, P. Evripidou
CRI-88-20 Minimum Spanning Tree on the HMESH Architecture
by R. V. Boppana, C. S Raghavendra
CRI-88-21 Fault-tolerant Networks based on the de Brujin Graph
by M. A. Sridhar, C. S. Raghavendra
CRI-88-22 A New approach to the Rearrangeability Problem of Multistage Interconnection Networks
by C. S. Raghavendra, M. A. Sridhar, Suresh Chalasani
CRI-88-23 Minimal Full-Access Networks; Enumeration and Characterization
by M. A. Sridhar, C. S. Raghavendra
CRI-88-24 Programming INMOS Transputers in a High-Level Data-Flow Language
by J. L. Gaudiot, T. L. Lee
CRI-88-25 Queueing Analysis of Delay Constrained Voice Traffic in a Packet Switching System
by Chin Yuan, John A. Silvester
CRI-88-26 Shared Data Contention in a Cache-Coherence Protocol
by M. Dubois, J.-C. Wong
CRI-88-27 An Area-Time Model for Synthesis of Non-Pipelined Designs
by R. Jain, M. J. Mlinar, A. C. Parker
CRI-88-28 Representation of Control in timing Behavior with Applications to Interface Synthesis
by S. Hayati, A. Parker
CRI-88-29 Concurrent Lisp Execution of AI-Oriented Gabriel Benchmarks with Hybrid Load Balancing
by Raymond Chowkwanyun, Kai Hwang
CRI-88-30 Analysis of Memory Access Dependencies in Shared-Memory Multiprocessors
by M. Dubois, C. Scheurich
CRI-88-31 Examples of Geometric Reasoning
by F. Arbab
by Prasanna Kumar
CRI-88-43 Dynamic Load Balancing in Distributed Heterogeneous Computer Systems
by Tze-Hore Howard Liu
CRI-88-59 A Methodology for Partial Scan Design Using Balanced Sequential Structures
by Rajesh, Rajiv Gupta and Melvin Breuer
CRI-88-60 On the Performance of Protocols to Support Intergrated Voice and Data Services
by Chin Yuan and John Silvester
CRI-88-61 MABAL: A Software Package for Module and Bus ALlocation
by Kayhan Küçükçakar and Alice C. Parker
CRI-88-62 Detecting Multiple Bridging Faults in CMOS Combinational Circuits
by Kuen-Jong Lee and Melvin Breuer

1987 Tech Reports

CRI-87-01 MACE: A FlexibleTestbed for Distributed AI Research
by L. Gasser, C. Braganza, N. Herman
CRI-87-02 Understanding Digital System Specifications Written in Natural Language
by J.J. Granacki, Jr.
CRI-87-03 Hypernets for Parallel Processing with Connectionist Architectures
by K. Hwang, J. Ghosh
CRI-87-04 Dynamic Load Balancing Methods for Message-Passage Multicomputers
by K. Hwang, R. Chowkwanyun
CRI-87-05 An Orthogonal Multiprocessor for Efficient Parallel Processing
by K. Hwang, P.S. Tseng, D. Kim
CRI-87-06 A Planning Model of the Design Process
by D.W. Knapp
CRI-87-07 Multiple Agent Cooperative Problem Solving with Axiom-Based Negotiation
by Sukhan Lee, Yeong Gil Shin
CRI-87-08 Interconnection Protocols for Interorganization Networks
by D. Estrin
CRI-87-09 Predicting Area Time Trade Offs Pipeline Designs
by R. Jain, A. Parker, N. Park
CRI-87-10 REAL: A Program for Register Allocation
by F.J. Kurdahi, A.C. Parker
CRI-87-11 PHRAN-SPAN; A Natural Language Interface for System Specifications
by J.J. Granacki, A.C Parker
CRI-87-12 Molecules: A Language Construct for Concurrent Programming
by Z. Xu, K. Hwang
CRI-87-13 Built-in Test for Folded Programmable Logic Arrays
by M.A. Breur, F. Saheban
CRI-87-14 Self-Diagnosis of Regular Arrays of Processors
by F. Saheban, M.A. Breur
CRI-87-15 Pipeline Nets for Compound Vector Supercomputing
by K. Hwang, Z. Xu
CRI-87-16 MACE: Multi-Agent Computing Environment Version 6.0 Release Note
by C. Braganza, L. Gasser
CRI-87-17 Dynamic Parallel Complexity of Computational Circuits
by G. Miller, S.H. Teng
CRI-87-18 Parallel Tree Contraction Part I- Fundamentals
by G. Miller, J.H. Reif
CRI-87-19 Minimal State Space Search in Production Systems
by D. Moldovan, V. Dixit
CRI-87-20 Schematic Database Modelling: Survey, Applications and Research Issues
by R. Hull, R. King
CRI-87-21 Fixed Axis Tool Positioning with Built in Global Interference Checking for NC-Path Generation
by A. Hansen, F. Arbab
CRI-87-22 Advanced Parallel Processing and Supercomputer Architectures
by K. Hwang
CRI-87-23 On Array Storage For Conflict-Free Memory Access for Paralle Processors
by M. Balakrishnan, R. Jain, C.S. Raghavenddra
CRI-87-24 Proposal for an Integrated System for Software Project Management
by E. Horowitz
CRI-87-25 An Extensible Object-Oriented Framework for Engineering Design
by K.V. Bapa Rao
CRI-87-26 Parallel Tree Contraction Part 2: Further Applications
by G. Miller, J.H. Reif
CRI-87-27 A Paradigm for Intelligent CAD for Inter-Organization Networks
by F. Arbab
CRI-87-28 Interconnection Protocols for Inter-Organization Networks
by D. Estrin
CRI-87-29 Interconnection of Private Networks: A Like Between Industrial and Telecommunications Policy
by D. Estrin
CRI-87-30 Detection of CMOS Stuck- Open Faults Using Random and Pseudo-Random Test Sequences
by S. Sastry, M. Breuer
CRI-87-31 Multi-Robot Assembly Process Planning
by S. Lee, Y.G. Shin
CRI-87-32 RUBIC: A Multiprocessor for Rule-Based Systems
by D. Moldovan
CRI-87-33 The Control of Surface Contact and Slide Using Wrist Force/Torque Sensor
by S. Lee, J.M. Lee
CRI-87-34 Optimal Allocation of Tasks to Multiprocessors
by D. Moldovan, R. Ashvin
CRI-87-35 Parallelism Analysis in Rule-Based Systems using Graph Grammars
by D. Moldovan, F. Parisi-Presicce
CRI-87-36 The Allocation Problem in Parallel Production Systems
by V. Dixit, D. Moldovan
CRI-87-37 Para-Logic Programming: A Technique for Developing Parallel Programs
by D. Jacobs
CRI-87-38 Analysis and Algorithms for the Area Efficient Layout of Custom Integrated Circuits
by M.S. Chandrasekhar
CRI-87-39 A Distributed-Control Function Invocation Mechanism for Data-Driven Execution
by Y. H. Wei, J-L. Gaudiot
CRI-87-40 Area Estimation of VLSI Circuits
by F. Kurdahi
CRI-87-41 A formal model for software project management
by L.C. Liu, E. Horowitz
CRI-87-42 A Simple Proof of Rearrangeability of Five Stage Shuffle/Exchange Network for N=8
by K. Kim, V.K. Prasanna Kumar
CRI-87-43 On Synthesizing Optimal Family of Linear Systolic Arrays for Matrix Multiplication
by Tsai, V.K. Prasanna Kumar
CRI-87-44 An Efficient Fixed Size Array for Solving Large Scale Toepliz Systems
by A. Daghi, V.K. Prasanna Kumar, A. Safari
by S. Kurtzman, S. Ginsburg
CRI-87-46 Input Dependent only Object Histories
by S. Ginsburg, D. Tiang
CRI-87-47 Sense & Verifiable Schemes for Electron & General Distributed Computing Problems
by M-D. Huang, S-H. Teng
CRI-87-48 VLSI Arrays with Reconfigurable Buses (Preliminary Version)
by V.K. Prasanna Kumar, D. Reisis
CRI-87-49 A Reduced Mesh of Trees Organization for Efficient Solutions to Graph Problems
by V.K. Prasanna Kumar, H.M. Alnuweiri
by V.K. Prasanna Kumar, H.M. Alnuweiri
CRI-87-51 Multiprocessor of Functions for Concurrent Lisp Processing
by K. Hwang, R. Chowkwanyun
CRI-87-52 Design and Analysis of Reliable Interconnection Networks
by A.M. Varma
CRI-87-53 Optimal Tree Contraction in EREW Model
by H. Gazit, G.L. Miller, S.H. Teng
CRI-87-54 A Parallel Algorithm for Finding a Separator in Planar Graphs
by H. Gazit, G. L. Miller
CRI-87-55 A Two-mode Dynamic Algorithm (TMDA) for Load-Balancing in Distributed Systems
by H. T. Liu, J. A. Silvester
CRI-87-56 Managing the Components of a Large-Scale Software Systems
by Y. Sugiyama, E. Horowitz
CRI-87-57 Fixed-Axis Tool Positioning with Built-in Global Interference Checking for NC Path Generation
by A. Hansen, F. Arbab
CRI-87-58 Contemporary Tool Positioning Methods
CRI-87-59 Module Selection for Pipelined Design
by R. Jain, A. Parker, N. Park
CRI-87-60 Understanding Software Documentation: Product Processes and Settings
by A. Jazzar
by K. Hwang, H. C. Wang
CRI-87-62 Demand-driven Interpretation of FP programs on a Data-Flow Multiprocessor
by J.-L Gaudiot, Y. H. Wei
CRI-87-63 Remarks on Spectroequivalence of Certain Discreet Operators
by Wlodek Proskurowski
CRI-87-65 Mapping Neural Networks onto Highly Parallel Multiprocessors
by Joydeep Ghosh, Kai Hwang
CRI-87-66 Understanding Software Technology Transfer
by Walt Scacchi, Jimm Babcock
CRI-87-67 Understanding Software Productivity
by Walt Scacchi, C. M. K. Kintala
CRI-87-68 The USC System Factory Project
by Walt Scacchi
CRI-87-69 Understanding Software Documentation: Products Processes and Settings
by Abdulaziz Jazzar, Walt Scacchi
CRI-87-70 Understanding the Production and Consumption of Software Documentation: An Empirical Study and Model
by Abdulaziz Jazzar
CRI-87-71 Abstraction Mechanism in Hypertext
by Pankaj K. Garg
CRI-87-72 A Hypertext System to Manage Software Life Cycle Documents
by Pankaj K. Garg, Walt Scacchi
CRI-87-73 A Software Hypertext Environment for Configured Software Descriptions
by Pankaj K. Garg, Walt Scacchi
CRI-87-74 On Designing Intelligent Hypertext Systems for Information Management in Software Engineering
by Pankaj K. Garg, Walt Scacchi

1986 Tech Reports

CRI-86-01 On Mapping Parallel Algorithms Into Mesh-Connected Computers
by T.C. Lin, D.I. Moldovan
CRI-86-02 Supercomputers and Artificial Intelligence Machines
by K. Hwang, J. Ghosh
CRI-86-03 Fault-Tolerant Multiprocessors with Redundant-Path Interconnection Networks
by C.S. Raghavendra, A. Varma
CRI-86-04 Rearrangeability of Multistage Shuffle/Exchange Networks
by C.S Raghavendra, A. Varma
CRI-86-05 Rearrangeability of the 5-Stage Shuffle/Exchange Network for N=8
by C.S Raghavendra, A. Varma
CRI-86-06 Fault-Tolerant Routing in Multistage Interconnection Networks
by A. Varma, C.S Raghavendra
CRI-86-07 Reservation CSMA/CD: A New Multiple Access Protocol For Lan
by S.J.Chen, Victor O.K. Li
CRI-86-08 A Termination Protocol For Simple Network Partitioning in Distributed Database Systems
by C.L. Huang, V.O.K. Li
CRI-86-09 Token Relabeling in a tagged data-flow architecture
by J.L. Gaudiot, Y.H. Wei
CRI-86-10 Iterative methods in subspace for solving elliptic problems using domain decomposition
by M. Dryja, W. Proskurowski
CRI-86-11 A knowledge based system for designing testable VLSI circuits
by M. S. Abadir
CRI-86-12 Domain decomposition seminar notes
by M. Dryja, W. Proskurowski
CRI-86-13 Parallel Processing Model for Loging Programming
by Y-W. Tung
CRI-86-14 Parallel I/O Processing in High-Speed Finite-Element Multiprocessors
by K. Hwang, P. Tseng
CRI-86-15 Reliability Analysis and Optimization the Design of Distributed Systems
by S. Hariri
CRI-86-16 Pyramids versus Enhanced Arrays for Parallel Image Processing
by V. K. P. Kumar, D. Reisis
CRI-86-17 Computer Architectures for Artificial Intelligence Processing
by K. Hwang, J. Ghosh, R. Chowkwanyun
CRI-86-18 Mapping Algorithms into Mesh Connected Computers
by T.C. Lin, D.I. Moldovan
CRI-86-19 Power and Ground Routing for Semi-Custom VLSI Circuits
by S. Chowdhury
CRI-86-20 Dependancy and Hazard Resolution in Multiprocessors
by M. Dubois, C. Scheurich
CRI-86-21 Performance Optimization Techniques for an Object-Oriented Semantic Data Model
by R. Ahad, D. McLeod
CRI-86-22 Synchronization, Coherence and Ordering of Events in Multiprocessors
by M. Dubois, C. Scheurich, F.A. Briggs
CRI-86-23 A Knowledge Based System for Testable Design Methodology Selection
by Xi-an Zhu
CRI-86-26 Molecules: Typed Procedures for Concurrent Programming on Vector/Parallel and Distrbuted Computers
by Z. Xu, K. Hwang
CRI-86-27 Application of Analytical Program Models to the Evaluation of Cache-Based Systems
by M. Dubois, J.C. Wang
CRI-86-28 Efficient Parallel Algorithms for Image Template Matching on Hyercube SIMD Machines
by V.K.P Kumar, V. Krishnan
CRI-86-29 Reduced Model Adaptive Inverse Control for Accurate Robot Arm Path Tracking
by S. Lee
CRI-86-30 Expert Assisted Robot Skill Acquisition Part I: Theory and Skill Transfer
by S. Lee, M-H. Kim
CRI-86-31 Expert Assisted Robot Skill Acquisition Part II: Skill Discovery and Experimentations
by S. Lee, M-H. Kim
CRI-86-32 Efficient Parallel Evaluation of Straight-Line Code and Arithmetic Circuits
by G. Miller, V. Ramachandran, E. Kaltofen
CRI-86-35 VTRAN: A VT to PNF Translator
by M. Milnar, A. Parker
CRI-86-37 Numerical Experiments and Implementation of a Domain Decomposition Method with Cross Points for the Model Problem
by M. Dryza, W. Proskurowski, O. Widlund
CRI-86-38 A New Dynamic Resource Allocation Scheme for Distributed Computer Systems
by H. Liu, J. Silvester

1985 Tech Reports

CRI-85-02 DIP A Data-Driven Instruction Pipeline Architecture
by M. Dubois, C. Schewrich
CRI-85-05 Area Estimation of VLSI Integrated Circuits
by Fadi J. Kurdahi and Alice c. Parker
CRI-85-07 A Reduced Multiprocessor for VLSI Implementation of Parallel Algorithms
by K. Hwang, P.S Tseng
CRI-85-08 Multipipeline Networking for Fast Evaluation of Vector Compound Function
by K. Hwang, Z. Xu
An Extensible Object-Oriented Approach to Databases for VLSI/CAD
by Hamideh Afsarmanesh, Dennis McLeof, David Knapp and Alice Parker
CRI-85-11 An Approah to Semi-Automatic Physical Database Design and Evolution for Personal Information Systems
by Rafiul Ahad and Dennis McLeod
CRI-85-13 The Relation-Partitioning Approach to Processing Star Queries in Distributed Databases
by C. P. Wang, Victor O.K. Li
CRI-85-16 Geometric Reasoning: A New Paradigm for Processing Geometric Information
by F. Arbab, J. Wing
    (DISC 83-6a)
A Data Structure For VLSI Synthesis and Verification
by David W. Knapp and Alice C. Parker
CRI-85-21 The 3DIS: An Extensible Object-Oriented Framework for Information Management
by Hamideh Afsarmanesh Tehrani
CRI-85-22 3.3 Interface and I/O Protocal Descriptions
by Alice C. Parker and Nohbyung Park
CRI-85-23 Synthesis of High-Speed Digital Systems
by Nohbyung Park
CRI-85-25 A Design Utility Manager
by David W. Knapp and Alice C. Parker
CRI-85-28 The Effect of Register-Transfer Design Tradeoffs on CHIP Area and Performance
by John J. Granacki and Alice C. Parker
CRI-85-29 Simulation Effectiveness Research Report
by Alice C. Parker
CRI-85-30 Wiring Space Estimation of Master Slice ICS
by Sarma Sastry
CRI-85-31 On the Relation between Wire Length Distributions and Placement of Logic on Master Slice ICS
by Sarma Sastry
CRI-85-32 Synthesis of Optimal Clocking Schemes for Digital Systems
by Nohbyung Park and Alice C. Parker
CRI-85-33 Simulation Effectiveness and Design Verification (Final Report)
by Alice C. Parker, Nohbyung Park and David W. Knapp
CRI-85-34 The ADAM Advanced Aotomation System: Overview, Planner and Natural Language Interface
by John Granacki, David Knapp and Alice Parker
CRI-85-36 Synthesis of Optimal Pipeline Clocking Schemes
Nohbyung Park and Alice Parker
CRI-85-37 FLEXISM: A Simulation Environment for Multiprocessor Systems
by J.Y.J. Liang, M. Dubois
CRI-85-38 Trace Driven Simulations of Parallel, Distributed Algorithms in Multiprocessors
by M. Dubois, J.L. Gaudiot, N. Tohme
CRI-85-39 Analysis of Partitioning and Allocation Techniques in a Cluster-Based Machine
by M. Dubois, J.L. Gaudiot, N. Tohme

1984 Tech Reports

DISC/84-3 The VLSI Implementation of A Square Root Algorithm
by J. Bannur and A. Varma

1983 Tech Reports

DISC/83-1 Roving Emulations as Applied to a (255, 223) RS Encoder System
by M.A. Breuer, F. Cohen, and A.A. Ismaeel
DISC/83-2 Simulation Effectiveness Research Report
by Alice C. Parker
DISC/83-3 RC Synthesis VLSI Macrocelis
by Davis Knapp and Melvin A. Breuer
DISC/83-4 ART: A high Level Layout Specification Language
by D.W. Knapp

1982 Tech Reports

DISC/82-5 On Area and Yield Considerations For Fault-Tolerant VLSI Processor Array
by Isreal Koren and Melvin A. Breuer
DISC/82-6 The Automatic Design of Testable Circuits
by M.A. Breuer
DISC/82-7 A Placement Algorithm For Array Processors
by Dah-juh Chyan and Melvin A. Breuer
DISC/82-8 The USC Roving Emulator
by Fred Cohen
DISC/82-9 Error Detection in Sequential Circuits Using Roving Emulations As a Detection Mechanism
by Asad A. Ismaeel
DISC/82-10 The Effect of Register-Transfer Design Tradeoffs on Chip Area and Performance
by John J. Granacki and Alice Parker

1981 Tech Reports

DISC/81-1 A Reconfigurable and Fault-Tolerant VLSI Multiprocessor Array
by Isreal Koren
DISC/81-2 Optimized Unidirectional Routing
by Hyeran Jeon, Gabriel H. Loh, Murali Annavaram
DISC/81-3 Theoretical Aspects of the Behavior of Digital Circuits Under Random Inputs
by S.K Kumar
DISC/81-4 Easily Testable Bit-sliced Digital Systems
by T. Sridhar
USCEE No. 510 Fault Tolerence of β-Networks in Interconnected Multicomputer Systems
by John P. Shen